AS Level 9618 · Paper 1 · 4.2
Assembly Language
How assembly language relates to machine code, and how to trace an assembly program. Read the notes, try the past-paper questions, then check the mark scheme.
Past papers from June 2021 to June 202622 questions · 118 marks
In this subtopic
- Assembly language and machine code
- The two-pass assembler
- Groups of instructions and the Cambridge instruction set
- Immediate, direct, indirect, indexed and relative addressing
- Tracing a simple assembly language program
4.2 · 1 of 16Book page Contents
Low-level languages and instruction sets
Low-level languages use the specific instruction set of a processor. The instruction set for each processor is defined by its manufacturer, so a low-level program can only be executed by the type of processor it was written for. For this reason, code written in a low-level language is non-portable: it will not run on a computer with a different processor.
There are two types of low-level programming language: machine code and assembly language (also called assembly code).
When designing a processor, the manufacturer has to decide which operations the processor will be able to carry out. Some examples of processor operations are:
- adding two numbers together
- storing data in registers
- loading data from main memory
The manufacturer then defines an instruction set: the set of instructions that lets a programmer use those operations. An instruction set only works with that particular processor, or with a group of processors that share the same operations, called a processor family.
Every instruction set gives the low-level programmer commands to move data into and out of the processor, and to use the processor’s internal registers so that data transfer is kept to a minimum. This means a low-level programmer must understand the design and abilities of the processor well. A programmer who understands a processor well enough can write extremely efficient programs that make the most of the processing power and memory available.
Used later in
4.2 · 2 of 16Book page Contents
Characteristics of low-level languages
Low-level languages have a 1:1 relationship with processor instructions. This gives a programmer fine control over how a program is executed, which allows extremely efficient programs.
When a programmer uses a low-level language, they can optimise a program to make the best use of the processor’s resources. For example, low-level languages let programmers use specific registers. A skilled programmer can precisely control the movement of data in and out of the processor, which improves the program’s efficiency.
Characteristics of low-level languages
- A 1:1 relationship with processor instructions.
- Non-portable: they only work on specific processors.
- They allow individual control of the processor’s components and registers.
- Programs usually need less memory and run faster than a high-level language program doing the same task.
Used later in
4.2 · 3 of 16Book page Contents
Machine code
Like everything inside a computer, a processor can only understand instructions given in binary. These binary instructions are called machine code.
Machine code is the only type of programming language that does not need to be translated before it is run, because it is already in binary. Every other programming language must first be translated into machine code instructions before a processor can execute them.
Writing machine code is very difficult for humans: a program made of nothing but 0s and 1s is hard to read and write, and very hard to debug.
Where people do need to see and work with machine code, it is usually shown in hexadecimal instead of binary, because hexadecimal is easier for humans to read and understand.
Used later in
4.2 · 4 of 16Book page Contents
Opcodes and operands
Each low-level instruction has two parts: an opcode and an operand.
- The opcode (short for operation code) is the part of the instruction that says which operation the processor should carry out, for example loading or storing data.
- The operand holds a value, or set of values, that the opcode works with. It can be the actual data, or a reference to the memory location of the data. For example, when the opcode is a “store” instruction, the operand holds the memory location where the data should be stored.
For example, a 16-bit instruction could be made of a 6-bit opcode followed by a 10-bit operand:
| Part | Bits |
|---|---|
| Opcode (6 bits) | 001100 |
| Operand (10 bits) | 0010110100 |
4.2 · 5 of 16Book pages Contents
Assembly language and machine code
Builds on
Assembly language lets programmers write machine code instructions using mnemonics: short codes made of letters that stand for the binary opcodes. (A mnemonic is a system of letters that helps you remember something. It is pronounced “neh-monic”.) The mnemonics are an English-like way of writing the operation the machine will carry out.
Here are two possible machine code opcodes and their assembly language equivalents. Every processor has its own machine code, instruction set and assembly language, so these are only an illustration.
| Machine code operation | Assembly language equivalent | Meaning |
|---|---|---|
| 0001 | ADD | Adds a value into the accumulator |
| 0101 | LDD | Fetches a value from a main memory location and loads it into the accumulator |
Assembly language has to be converted into machine code before it can run. The assembly language source code is translated into its machine code equivalent. This process is called assembling, and it is done by a program called an assembler.
Assembly language is low-level, so it works directly with main memory. In the example below, the numbers 8, 9 and 10 in the assembly language are memory locations: location 8 holds 5, location 9 holds 2, and the result is stored in location 10.
| Python (high level) | Assembly language (low level) | Machine code (low level) | |
|---|---|---|---|
| 1 | sum = 5 + 2 | LDD 8 | 01011000 |
| 2 | ADD 9 | 00011001 | |
| 3 | STO 10 | 00111010 |
Each machine code instruction here is 8 bits: a 4-bit opcode (0101 for LDD, 0001 for ADD, 0011 for STO) followed by a 4-bit operand, the memory address (1000 is 8, 1001 is 9, 1010 is 10).
The relationship between assembly language and machine code
- There is a 1:1 relationship: each assembly language instruction translates into exactly one machine code instruction.
- Assembly language uses mnemonics in place of the binary opcodes, so it is easier for people to read and write.
- An assembler translates the assembly language into machine code before the processor can execute it.
Used later in
4.2 · 6 of 16Book page Contents
Extra features an assembler allows
Builds on
A program written in assembly language has to be translated into machine code by an assembler before the processor can execute it. Assembly language is easier to write than machine code, and the assembler also lets the programmer use some special features in an assembly language program, for example:
- comments
- symbolic names for constants
- labels for addresses
- macros
- directives
A macro is a sequence of instructions that is used more than once in a program. A directive is an instruction to the assembler about how it should build the final executable machine code. For example, a directive might say how memory should be used, or define the files or procedures that will be used.
4.2 · 7 of 16Book page Contents
Advantages and disadvantages of low-level languages
Builds on
Advantages of low-level languages
- They allow a programmer to create optimised programs.
- When a computer system has limited resources (processing power and memory), low-level languages let the programmer control more directly how those resources are used.
High-level languages also have to be translated into machine code, but the programmer has little or no say in how this is done. With assembly language, the programmer can optimise the program. For example, low-level languages can use specific registers, so a skilled programmer can directly control the movement of data in and out of the processor.
Disadvantages of low-level languages
- Programs are harder to write than in a high-level language; the programmer needs a very good understanding of the hardware being used.
- They are not portable, because they are specific to one instruction set. A high-level language program can be compiled or translated for different processors.
- Unlike high-level languages, they have no libraries of functions that the programmer can import and use, so the programmer has to write every process the program needs.
Used later in
4.2 · 8 of 16Book page Contents
Assemblers: single pass and two pass
Builds on
Before a program written in assembly language (the source code) can be executed, it has to be translated into machine code by an assembler. The assembler translates each assembly language instruction into one machine code instruction.
The assembler also checks the syntax of the assembly language program, to make sure that only opcodes from the processor’s instruction set are used. This speeds up development, because some errors are found during translation, before the program is executed.
There are two types of assembler:
- A single pass assembler puts the machine code instructions straight into the computer’s memory to be executed.
- A two pass assembler produces an object program in machine code that can be stored, then loaded and executed later. This needs another program, called a loader. A two pass assembler has to read (scan) the source program twice, so that it can replace the labels in the assembly program with memory addresses in the machine code program.
For example, the assembly language instruction LDD Total uses the label Total. In the machine code (shown in hexadecimal) the label has been replaced by a memory address:
| Assembly language | Machine code (hexadecimal) |
|---|---|
LDD Total (opcode LDD, label Total) | 01 40 (opcode 01, memory address 40) |
4.2 · 9 of 16Book pages Contents
The two passes and the symbol table
Builds on
Pass 1
- Read the assembly language program one line at a time.
- Ignore anything that is not needed, such as comments and white space.
- Allocate a memory address to the line of code.
- Check that the opcode is in the instruction set.
- Add any new labels to the symbol table, with their address if it is known. When a labelled instruction is reached, its address is placed in the symbol table.
Pass 2
- Read the assembly language program one line at a time.
- Generate the object code, including the opcode and the operand, using the symbol table made in pass 1.
- Save or execute the program.
The second pass is needed because a label may be used before its address is known. In the program below, Found is a forward reference: the JPN instruction uses it before the line labelled Found: has been reached.
Label Opcode Operand
Notfound: LDD 200
CMP #0
JPN Found
JPE Notfound
Found: OUTIf the program is loaded at memory address 100, and each memory location holds 16 bits (one instruction), the symbol table for this small section of program is:
| Label | Address |
|---|---|
| Notfound | 100 |
| Found | 104 |
Which pass does what
- First pass only: removes comments and white space, checks the opcode is in the instruction set, adds labels to the symbol table.
- Second pass only: generates the object code.
- Both passes: read the assembly language program one line at a time.
Practise this: past-paper questions
- November 2022 · Paper 11 · Q6(c)Tick (✓) one or more boxes in each row to indicate whether the task is performed in the first pass or the second pass of a two-pass assembler. |…
- June 2023 · Paper 12 · Q3(a)The program is converted into machine code by a two-pass assembler. Draw one or more lines to identify the pass or passes in which each action…
- November 2023 · Paper 11 · Q8(a)Identify the purpose of the first pass of a two-pass assembler
4.2 · 10 of 16Contents
Applying the two-pass process to a program
Builds on
An exam question may give you a short program with labels and ask you to complete the symbol table, or to show the code after the second pass. Remember the syllabus rule <label>: <data>: a label in front of a data value gives that memory location a symbolic address.
Worked example
This program adds 3 + 2 + 1 and leaves the total in Total. It is loaded at address 100 and each instruction or data item takes one memory location. Complete the symbol table, then show the program after pass 2.
- Step 1Give each line an address in pass 1. Total and Num are used at addresses 101 and 103 before they are defined at 113 and 114, so they are forward references: pass 1 adds them to the symbol table as soon as it meets them and fills in their addresses when it reaches them. Finish is also a forward reference (used at 109, defined at 111).
100 LDM #0 101 STO Total 102 Loop: LDD Total 103 ADD Num 104 STO Total 105 LDD Num 106 DEC ACC 107 STO Num 108 CMP #0 109 JPE Finish 110 JMP Loop 111 Finish: LDD Total 112 END 113 Total: 0 114 Num: 3 - Step 2The finished symbol table after pass 1:
Label Address Loop 102 Finish 111 Total 113 Num 114 - Step 3Pass 2 reads the program again and replaces every label with its address from the symbol table, then generates the object code:
100 LDM #0 101 STO 113 102 LDD 113 103 ADD 114 104 STO 113 105 LDD 114 106 DEC ACC 107 STO 114 108 CMP #0 109 JPE 111 110 JMP 102 111 LDD 113 112 END 113 0 114 3 - Step 4Check by tracing: Total becomes 3, then 5, then 6, while Num counts down 3, 2, 1, 0. When Num reaches 0 the jump to 111 loads the total, 6, into the ACC.
Used later in
4.2 · 11 of 16Book page Contents
Addressing modes
Builds on
Assembly language and machine code programs use different addressing modes, depending on what the program needs. The addressing mode says how the operand is used to find the data.
- Immediate addressing: the operand is the value to be used. For example,
LDM #200stores 200 in the accumulator. - Direct addressing: the operand is the address of the data; the contents of that memory location are used. For example, if the memory location with address 200 holds 20,
LDD 200stores 20 in the accumulator. Absolute addressing is the same as direct addressing. - Indirect addressing: the operand is an address that holds the address of the data, so the contents of the contents of the memory location are used. For example, if address 200 holds 20 and address 20 holds 5,
LDI 200stores 5 in the accumulator. - Indexed addressing: the address of the data is found by adding the contents of the Index Register (IX) to the address in the operand. For example, if IX holds 4 and address 204 holds 17,
LDX 200stores 17 in the accumulator. - Relative addressing: the address used is the address of the current instruction plus the operand (an offset). For example, an instruction such as
JMR #5would transfer control to the instruction 5 locations after the current instruction. - Symbolic addressing: used only in assembly language programming. A label is used in place of an address. For example, if the memory location labelled MyStore holds 20,
LDD MyStorestores 20 in the accumulator.
Note JMR is not in the Cambridge instruction set. It only shows the idea. Relative addressing is useful because the code still works wherever it is loaded in memory: the jump is a distance from the current instruction, not a fixed address.
Exam definitions
- Immediate: the operand is the data.
- Direct: the operand holds the memory address of the data.
- Indirect: the operand holds a memory address that stores the memory address of the data.
- Indexed: the address of the data is the operand plus the contents of the Index Register.
- Relative: the address is an offset from the address of the current instruction.
Worked example: the same memory, four addressing modes
Memory holds: address 200 contains 203, 201 contains 15, 202 contains 7, 203 contains 42. The Index Register holds 2. Give the contents of the ACC after each instruction.
- Step 1
LDM #201is immediate: the operand is the number itself.ACC = 201 - Step 2
LDD 201is direct: load the contents of address 201.ACC = 15 - Step 3
LDI 200is indirect: address 200 holds 203, so load the contents of address 203.ACC = 42 - Step 4
LDX 200is indexed: 200 + IX (2) = 202, so load the contents of address 202.ACC = 7
Practise this: past-paper questions
- November 2021 · Paper 12 · Q8(b)(iii)The opcode LDM uses immediate addressing. The opcode LDD uses direct addressing. Identify and describe one additional mode of addressing. Mode of…
- June 2022 · Paper 13 · Q3(a)The table shows part of the instruction set for a processor. The processor has one general purpose register, the Accumulator (ACC). | Opcode |…
- November 2022 · Paper 13 · Q6(a)(ii)Explain the purpose of relative addressing in an assembly language program
- June 2023 · Paper 12 · Q3(b)Assembly language statements can use different modes of addressing. Complete the following description of addressing modes. addressing is when the…
Show 15 more
- November 2023 · Paper 11 · Q8(b)(ii)The instruction LDR #2 uses immediate addressing. Give one similarity and one difference between direct addressing and indexed addressing.…
- November 2023 · Paper 11 · Q8(b)(iii)Identify one other mode of addressing
- June 2024 · Paper 11 · Q4(a)The current contents of memory are shown: Address | Data 19 | 24 20 | 2 21 | 1 22 | 3 23 | 5 24 | 4 25 | 22 The current contents of the ACC and IX…
- June 2024 · Paper 12 · Q5(a)The current contents of memory are shown: Address | Data 10 | 1 11 | 3 12 | 5 13 | 11 14 | 10 15 | 16 16 | 12 The current contents of the ACC and…
- June 2024 · Paper 13 · Q3(a)The current contents of memory are shown: | Address | Data | | 48 | 51 | | 49 | 6 | | 50 | 48 | | 51 | 50 | | 52 | 49 | | 53 | 50 | | 54 | 6 | The…
- November 2024 · Paper 12 · Q8(a)The current contents of memory are shown: | Address | Data | | 19 | 25 | | 20 | 23 | | 21 | 2 | | 22 | 4 | | 23 | 15 | | 24 | 50 | | 25 | 22 | The…
- November 2024 · Paper 13 · Q7(a)The current contents of memory are shown: Address | Data 50 | 54 51 | 55 52 | 50 53 | 52 54 | 100 55 | 25 56 | 50 The current contents of the ACC…
- June 2025 · Paper 12 · Q7(a)(ii)State the effect of changing instruction LDD 10 in address 100 to LDM #10
- June 2025 · Paper 12 · Q7(a)(iii)Identify and describe one mode of addressing not given in the table of instructions in part (a)
- June 2025 · Paper 13 · Q5(a)(ii)Complete the table by identifying and describing two modes of addressing that are not used in the program in part (a). Mode of addressing |…
- November 2025 · Paper 12 · Q3(a)(i)State what is meant by relative addressing
- November 2025 · Paper 12 · Q3(b)The following table shows part of the instruction set for a processor. The processor has two registers: the ACC and an IX. Instruction (Opcode /…
- June 2026 · Paper 11 · Q3(a)Complete the table to identify the data that will be stored in the accumulator after each set of instructions has been executed. accumulator…
- June 2026 · Paper 11 · Q3(c)Immediate, relative and direct are three modes of addressing used in assembly language programming. Identify and describe one additional mode of…
- June 2026 · Paper 13 · Q7(a)Complete the table by writing the name of each mode of addressing. mode of addressing | description | The operand is an address where the data is…
4.2 · 12 of 16Book pages Contents
The instruction set and instruction groups
Builds on
In the exam you will be given part of this instruction set. These rules apply to every question:
- There is only one general purpose register, the Accumulator (ACC).
- IX is the Index Register.
<address>can be an absolute or a symbolic address.#shows a denary number, for example#123.Bshows a binary number, for exampleB01001010.&shows a hexadecimal number, for example&4A.
Each table row gives the opcode, the operand it takes (if any) and what the instruction does. The instructions are grouped by what they do. These are the instruction groups:
Data movement
| Opcode | Operand | Explanation |
|---|---|---|
| LDM | #n | Immediate addressing. Load the number n to ACC |
| LDD | <address> | Direct addressing. Load the contents of the location at the given address to ACC |
| LDI | <address> | Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC |
| LDX | <address> | Indexed addressing. Form the address from <address> + the contents of the index register. Copy the contents of this calculated address to ACC |
| LDR | #n | Immediate addressing. Load the number n to IX |
| MOV | <register> | Move the contents of the accumulator to the given register (IX) |
| STO | <address> | Store the contents of ACC at the given address |
Arithmetic operations
| Opcode | Operand | Explanation |
|---|---|---|
| ADD | <address> | Add the contents of the given address to the ACC |
| ADD | #n/Bn/&n | Add the number n to the ACC |
| SUB | <address> | Subtract the contents of the given address from the ACC |
| SUB | #n/Bn/&n | Subtract the number n from the ACC |
| INC | <register> | Add 1 to the contents of the register (ACC or IX) |
| DEC | <register> | Subtract 1 from the contents of the register (ACC or IX) |
Input and output of data
| Opcode | Operand | Explanation |
|---|---|---|
| IN | Key in a character and store its ASCII value in ACC | |
| OUT | Output to the screen the character whose ASCII value is stored in ACC |
Unconditional and conditional instructions (jumps)
| Opcode | Operand | Explanation |
|---|---|---|
| JMP | <address> | Jump to the given address |
| JPE | <address> | Following a compare instruction, jump to <address> if the compare was True |
| JPN | <address> | Following a compare instruction, jump to <address> if the compare was False |
| END | Return control to the operating system |
Compare instructions
| Opcode | Operand | Explanation |
|---|---|---|
| CMP | <address> | Compare the contents of ACC with the contents of <address> |
| CMP | #n | Compare the contents of ACC with number n |
| CMI | <address> | Indirect addressing. The address to be used is at the given address. Compare the contents of ACC with the contents of this second address |
The bit manipulation instructions (AND, OR, XOR, LSL, LSR) and labels are covered in 4.3.
The five instruction groups
- Data movement, for example
LDD 200orSTO 201(loading, storing and moving data). - Input and output of data:
INandOUT. - Arithmetic operations, for example
ADD #5,INC IXorDEC ACC. - Unconditional and conditional instructions (jumps or branches), for example
JMP 100orJPE 110. - Compare instructions, for example
CMP #0orCMI 102.
Note JPE and JPN only make sense straight after a compare instruction: the compare sets the result (True or False) that the jump tests.
Practise this: past-paper questions
- November 2021 · Paper 12 · Q8(b)(ii)The following table contains five assembly language instruction groups. Write an appropriate assembly language instruction for each instruction…
- June 2022 · Paper 13 · Q3(b)The instructions in part (a) are examples of the data movement group. Describe two other instruction groups. 1 2
- November 2022 · Paper 13 · Q6(c)One instruction group is data movement. Give the name of one other instruction group
- November 2023 · Paper 11 · Q8(b)(i)Give one example of an instruction that belongs to each of the following instruction groups. Only use the instructions given in the table. Each…
Show 3 more
- November 2023 · Paper 12 · Q9(a)The instructions in the processor's instruction set can be grouped according to their function. Identify the instruction group for each of the…
- November 2025 · Paper 13 · Q6(c)Assembly language instructions are grouped. Complete each statement by writing the name of the appropriate instruction group. Loading data into…
- June 2026 · Paper 11 · Q3(a)Complete the table to identify the data that will be stored in the accumulator after each set of instructions has been executed. accumulator…
4.2 · 13 of 16Book pages Contents
Status register flags during arithmetic
Builds on
The values stored in the status register can show that a calculation has gone wrong. Three flags are used:
- the carry flag, C, is set to 1 if there is a carry out of the most significant bit
- the negative flag, N, is set to 1 if the result is negative
- the overflow flag, V, is set to 1 if overflow is detected
Consider adding two positive values whose sum is too large to be stored correctly in the number of bits available. Using 8-bit two’s complement integers, add denary 66 and denary 68:
0100 0010 (66)
+ 0100 0100 (68)
---------
1000 0110 (−122)
Flags: N = 1, V = 1, C = 0The answer produced is denary −122: two positive numbers have been added to give a negative number. This impossible result is detected because the negative flag and the overflow flag are both set to 1. The processor examines the flags, identifies the problem and generates an interrupt.
Now use the same 8-bit representation to add two negative numbers, −66 and −68:
1011 1110 (−66)
+ 1011 1100 (−68)
---------
(1)0111 1010 (+122)
Flags: N = 0, V = 1, C = 1The answer is +122, which is impossible for two negative numbers. This is detected because the negative flag is not set while both the overflow flag and the carry flag are set to 1.
4.2 · 14 of 16Book pages Contents
Tracing a program: worked example 1
Builds on
One way to check whether an assembly language program has errors is a dry run (a practice run by hand). The main thing to check is how the contents of the accumulator change as the program runs. You record this in a trace table.
For this example the trace table needs a column for the accumulator, two columns for memory locations and one for the output. The three IN instructions put the values 15, 27 and 31 into the ACC, in that order.
| Address | Instruction |
|---|---|
| 100 | IN |
| 101 | STO 200 |
| 102 | IN |
| 103 | STO 201 |
| 104 | IN |
| 105 | ADD 200 |
| 106 | STO 200 |
| 107 | ADD 201 |
| 108 | INC ACC |
| 109 | OUT |
| 110 | END |
| Accumulator | Memory location 200 | Memory location 201 | Output |
|---|---|---|---|
| 15 | |||
| 15 | |||
| 27 | |||
| 27 | |||
| 31 | |||
| 46 | |||
| 46 | |||
| 73 | |||
| 74 | |||
| J |
Note OUT outputs the character whose ASCII value is in the ACC, so the output is J (ASCII 74), not the number 74. In the same way, IN stores the ASCII value of the key pressed. In the exam, use the ASCII table you are given to turn values into characters.
Here a new row is used for each instruction, which helps with checking. Another correct method is to write each value in the first free position in its column: for example, the Memory location 200 column could have 15 and 46 in its first two rows.
If an instruction does not change a column, you do not need to write the value again. A trace table only needs to show changes; it does not have to record every value at every step.
Practise this: past-paper questions
4.2 · 15 of 16Book pages Contents
Tracing a program with a jump: worked example 2
Builds on
Some instructions for part of a program are stored in memory locations 100 upwards, and some 4-bit binary data values are stored in locations 200 upwards. The instructions are shown in assembly language. At the start, memory holds:
| Address | Instruction |
|---|---|
| 100 | LDD 200 |
| 101 | INC ACC |
| 102 | ADD 201 |
| 103 | CMP 202 |
| 104 | JPE 106 |
| 105 | DEC ACC |
| 106 | INC ACC |
| 107 | STO 203 |
| Address | Data |
|---|---|
| 200 | 0001 |
| 201 | 0011 |
| 202 | 0101 |
| 203 | (empty) |
Because the program contains a jump instruction, the trace table records the program counter (PC) as well as the accumulator.
| Program counter (PC) | Accumulator (ACC) | Memory location 203 |
|---|---|---|
| 100 | 1000 | |
| 101 | 0001 | |
| 102 | 0010 | |
| 103 | 0101 | |
| 104 | ||
| 106 | ||
| 107 | 0110 | |
| 108 | 0110 |
The rows of the table can be explained like this:
- The first row shows the values before this part of the program runs. The accumulator holds a value left by an earlier instruction.
- The second row shows the result of the instruction in location 100, which loads 0001 into the ACC. The PC is then automatically incremented to 101.
- The next two rows show the ACC being changed by the instructions in 101 (add 1, giving 0010) and 102 (add 0011, giving 0101), with the PC incremented each time.
- The fifth row has no new value in the ACC, because the instruction in 103 only compares (0101 with 0101), but the PC is still incremented.
- The sixth row shows a new value in the PC, 106, because the jump instruction in 104 tested for equality and found it to be True. The instruction in 105 is skipped.
- The seventh row shows the result of the instruction in 106, which increments the ACC to 0110.
- The final row shows the value 0110 stored in location 203.
Practise this: past-paper questions
- June 2021 · Paper 12 · Q4(a)Complete the trace table for the program currently in main memory when the following characters are input: A D Do not trace the program any…
- June 2025 · Paper 11 · Q8(a)The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index…
- June 2025 · Paper 12 · Q7(a)(i)Trace the program currently in memory using the following trace table. Instruction address | ACC | 10 | 11 | 12 | 13 | 14 | | 12 | 11 | 10 | 22 | 22
- June 2025 · Paper 13 · Q5(a)(i)Trace the program currently in memory using the following trace table. Instruction address | ACC | 50 | 51 | 52 | 53 | | 47 | 48 | 49 | 50
4.2 · 16 of 16Contents
Tracing a loop with the Index Register
Builds on
Exam trace questions often use the Index Register to step through a list of values in memory, and OUT to output characters. Each time round the loop, INC IX moves on to the next memory location, so LDX loads the next value. A trace table for this kind of program usually has a column for the instruction address, the ACC, IX and the output.
In this program, memory locations 200 to 203 hold 75, 72, 73 and 0. In ASCII, 72 is H, 73 is I and 75 is K.
100 LDR #0
101 LDX 200
102 CMP #0
103 JPE 107
104 OUT
105 INC IX
106 JMP 101
107 ENDWorked example: a loop that outputs characters
Trace the program above.
- Step 1
LDR #0sets IX to 0.LDX 200loads the contents of 200 + 0, which is 75. 75 is not 0, soJPE 107does not jump.OUToutputs K.INC IXmakes IX 1 andJMP 101goes back.Address ACC IX Output 100 0 101 75 104 K 105 1 - Step 2Second time round:
LDX 200loads the contents of 200 + 1, which is 72, and outputs H. Third time: 200 + 2, which is 73, and outputs I.Address ACC IX Output 101 72 104 H 105 2 101 73 104 I 105 3 - Step 3Fourth time:
LDX 200loads the contents of 203, which is 0.CMP #0is True, soJPE 107jumps toEND. The output is KHI.Address ACC IX Output 101 0 107
Note Only record a value when it changes, and only trace as far as the question asks (for example, “stop when line 90 is executed for a second time”).
Practise this: past-paper questions
- June 2021 · Paper 11 · Q3(b)The current contents of the main memory and selected values from the ASCII character set are shown. | Address | Instruction | | 200 | LDD 365 | |…
- June 2021 · Paper 12 · Q4(a)Complete the trace table for the program currently in main memory when the following characters are input: A D Do not trace the program any…
- November 2022 · Paper 11 · Q6(a)(i)Trace the program currently in memory using the trace table. | Address | Instruction | | 77 | LDR #0 | | 78 | LDX 110 | | 79 | CMP #35 | | 80 |…
- November 2022 · Paper 12 · Q7(a)Trace the program currently in memory using the trace table, stopping when line 90 is executed for a second time. | Address | Instruction | | 75 |…
Show 2 more
- November 2022 · Paper 13 · Q6(a)(i)Trace the program currently in memory using the trace table. | Instruction address | Instruction | ACC | IX | 100 | 101 | 110 | 111 | 112 | Output…
- November 2023 · Paper 12 · Q9(b)The current contents of main memory and selected values from the ASCII character set are given on page 15. Trace the program currently in memory…
4.2
Concepts in 4.2
Every idea explained in 4.2, and where else in the notes it is used.
Zain Merchant's notes, page by page, as printed in his book. The Notes tab has the same notes as text, with links.
Past-paper questions and mark schemes © Cambridge University Press & Assessment. Compiled for revision by Zain Merchant.
- June 2021 · Paper 11 · Q3Notes:Tracing a loop with the Index Register
- June 2021 · Paper 12 · Q4Notes:Tracing a program with a jump: worked example 2Tracing a loop with the Index RegisterBit manipulation instructions
- November 2021 · Paper 12 · Q8Notes:Addressing modesThe instruction set and instruction groups
- June 2022 · Paper 13 · Q3Notes:Addressing modesThe instruction set and instruction groups
- November 2022 · Paper 11 · Q6Notes:The two passes and the symbol tableTracing a program: worked example 1Tracing a loop with the Index Register
- November 2022 · Paper 12 · Q7Notes:Tracing a loop with the Index Register
- November 2022 · Paper 13 · Q6Notes:Addressing modesThe instruction set and instruction groupsTracing a loop with the Index Register
- June 2023 · Paper 12 · Q3Notes:The two passes and the symbol tableAddressing modes
- November 2023 · Paper 11 · Q8Notes:The two passes and the symbol tableAddressing modesThe instruction set and instruction groups
- November 2023 · Paper 12 · Q9Notes:The instruction set and instruction groupsTracing a loop with the Index Register
- June 2024 · Paper 11 · Q4Notes:Addressing modes
- June 2024 · Paper 12 · Q5Notes:Addressing modes
- June 2024 · Paper 13 · Q3Notes:Addressing modes
- November 2024 · Paper 12 · Q8Notes:Addressing modes
- November 2024 · Paper 13 · Q7Notes:Addressing modes
- June 2025 · Paper 11 · Q8Notes:Tracing a program with a jump: worked example 2
- June 2025 · Paper 12 · Q7Notes:Addressing modesTracing a program with a jump: worked example 2
- June 2025 · Paper 13 · Q5Notes:Addressing modesTracing a program with a jump: worked example 2
- November 2025 · Paper 12 · Q3Notes:Addressing modes
- November 2025 · Paper 13 · Q6Notes:The instruction set and instruction groups
- June 2026 · Paper 11 · Q3Notes:Addressing modesThe instruction set and instruction groups
- June 2026 · Paper 13 · Q7Notes:Addressing modes
Past-paper questions and mark schemes © Cambridge University Press & Assessment. Compiled for revision by Zain Merchant.
Try the questions first.
Write your answers, then check them against the mark scheme. Your choice is remembered on this device.