Processors, Parallel Processing and Virtual Machines

There are two main types of processor:

• RISC (reduced instruction set computer) processors are used in modern smartphones and tablets, and now in some laptops. This type of processor can carry out simple instructions quickly. Several instructions are needed to carry out basic tasks, such as adding together two numbers.
• CISC (complex instruction set computer) processors are used in desktop and laptop computers. This type of processor can process more complex instructions. For example, a single instruction can load two values, calculate their sum and store the result back in memory.

Many high-end computer systems have graphics cards that contain a GPU (graphics processing unit). GPUs are designed for parallel processing, which can improve the performance of applications that make heavy use of video or graphics.

RISC processors are designed to process simple instructions quickly. They need less circuitry, so they are cheaper to design and produce, give off less heat and use less power than CISC processors. This makes RISC processors suitable for tablets, smartphones and embedded systems, where there is no need to carry out complex instructions.

CISC processors can process more complex instructions than RISC processors. More circuitry is needed to carry out complex tasks.

Compared with a RISC processor, a CISC processor:

• is more expensive to design and produce
• gives off more heat
• uses more power
• processes complex instructions faster
• is physically larger

RISC and CISC are types of processor with different instruction set architectures (ISAs).

The main feature of RISC is that its instruction set is made of simple commands that are designed to take the same time to execute: one instruction is carried out per system clock cycle. This means that several instructions are needed to carry out a basic task, such as adding together two numbers. Because of this, low-level programs for RISC processors are longer and take up more memory. However, the simpler instruction design makes pipelining easier to implement, which in turn increases the performance of RISC processors. RISC processors also need less circuitry, so they are cheaper to design and produce, give off less heat and use less power than CISC processors.

The hardware of a CISC processor is designed to execute complex instructions: it carries out several low-level operations as part of a single instruction. For example, one instruction can load two values, calculate their sum and store the result back in memory. Because the instructions are more specialised, low-level programs for CISC processors take up less space in main memory and are easier to translate into machine code. However, pipelining is much more difficult on a CISC processor, because its instructions vary in length and take different amounts of time to execute.

The diagram below shows the same job done on each type of processor. RISC needs four simple instructions (Load, Load, Prod, Store); CISC does it with a single instruction (Mult).

Interrupts are used on a RISC processor in just the same way as on a CISC processor. The same definition of an interrupt holds: a signal sent from a hardware device to the processor to show that the device needs attention.

Using interrupts means the processor does not have to keep checking whether a hardware device needs its attention. That strategy, called polling, was used before interrupts.

The system uses vectored interrupts. Every device is given a device number that matches the bits sent to an interrupt register, so from the number the processor knows the source of the interrupt.

Once the interrupt is received, the contents of all the registers must be saved and the right interrupt service routine (ISR) code is executed.

One of the major developments that came from RISC architecture is pipelining. It is one of the less complex ways of improving computer performance. Pipelining allows several instructions to be processed at the same time, without having to wait for the previous instructions to be completed.

To see how this works, split the execution of an instruction into its five stages:

1. instruction fetch cycle (IF)
2. instruction decode cycle (ID)
3. operand fetch cycle (OF)
4. instruction execution cycle (IE)
5. write back result process (WB)

Take a program with six instructions: A, B, C, D, E and F. The table shows which instruction is at each processor stage in each clock cycle when pipelining is used, with every stage taking one clock cycle to complete. This needs a processor with several registers, to store each of the stages.

Note The column headings 1 to 10 are the clock cycles.

The execution of each instruction is split into stages. During clock cycle 1, the first stage of instruction A is carried out. During clock cycle 2, the second stage of instruction A and the first stage of instruction B are carried out. During clock cycle 3, the third stage of A, the second stage of B and the first stage of C are carried out. This continues until all the instructions have been processed.

When instruction A completes, in clock cycle 5, instruction E is at the first stage and instructions B to D are at the stages in between; F starts in clock cycle 6. Several instructions are processed at the same time, and there is no need to wait for one instruction to go through all five stages before the next one can start.

In this example the six instructions need 10 clock cycles to complete. Without pipelining they would need 30 clock cycles (6 × 5), because each of the six instructions needs five stages to complete.

When the processor detects an interrupt (at the end of the fetch-execute cycle), the current program is temporarily stopped (depending on interrupt priorities) and the status of each register is stored. After the interrupt has been serviced, the processor can be restored to the status it had before the interrupt was received.

With pipelining, interrupt handling has an added complexity: when the interrupt is received, there could be several instructions still in the pipeline. The usual way to deal with this is to discard all the instructions in the pipeline except the last one, the instruction in the write back (WB) stage.

The interrupt handler routine is then applied to this remaining instruction and, once the interrupt has been serviced, the processor restarts with the next instruction in the sequence.

Another way, although much less common, is to store the contents of all five stages in registers. This saves all the current data, so the processor can be restored to its previous status once the interrupt has been serviced.

There are four basic computer architectures: SISD, SIMD, MISD and MIMD.

Single Instruction Single Data (SISD) is the original Von Neumann architecture, which does not use any kind of parallelism. The sequential processor takes data from a single address in memory and performs a single instruction on the data. All single-processor systems are SISD.

• Common usage: older computers; microcontrollers.
• Advantages: low power needs, as there is only a single core; a simpler architecture than the others, so it is cheaper and easier to manufacture.
• Disadvantage: the speed of the system is limited because it has only a single core.

In Single Instruction Multiple Data (SIMD), a single instruction is carried out on several different data streams. The instructions can be performed one after another, taking advantage of pipelining, or in parallel using several processors. Modern GPUs, which contain vector processors and array processors, are usually SIMD systems.

• Common usage: graphics processing units performing vector and array operations; scientific processing.
• Advantage: very efficient when the same instruction has to be performed on large amounts of data.

In Multiple Instruction Single Data (MISD), several instructions are performed on a single data stream. It is an uncommon type, mostly used for fault tolerance: different systems perform operations on the data and all the results must agree. It is used in flight control systems, where fault detection is critical.

• Common usage: not used commercially; some special-purpose systems, such as space flight control.
• Advantage: excellent where fault tolerance is critical.

In Multiple Instruction Multiple Data (MIMD), several independent processors perform operations on different pieces of data, either separately or as part of a shared memory space.

• Common usage: most modern desktop, laptop and mobile processors are MIMD processors.
• Advantage: great when you need to perform a variety of tasks that need a lot of processing and data, such as video editing and game rendering.

The MIMD architecture can be used in multicomputer systems known as massively parallel computers. Large organisations use these systems for calculations that involve highly complex mathematical processing. They are the latest type of supercomputer.

The major difference in architecture is that, instead of a bus structure supporting several processors, there is a network infrastructure supporting several computer units. The programs running on the different computers can communicate by passing messages over the network.

Another type of multicomputer system is cluster computing using PCs, sometimes called a server farm.

Whatever the technology used, these systems have an extremely large number of individual processors working in parallel.

Because of advances in hardware, processing power has reached a point where systems can run as software processes inside other software that is already running, without a big loss of performance.

A host system can run software that lets other software behave as if it were running on a hardware system: this is called a virtual machine (VM). A VM can be set up to copy any combination of hardware, so the software running on it works as if it were using certain devices, even if those devices do not exist.

Virtual machines can fill many roles, including:

• Running other operating systems: a VM can be created so that one operating system can be installed inside another operating system. This might be a legacy OS, or an OS that would not normally be able to run on the host hardware. The VM can emulate different hardware setups, so the software runs as if it were on a different hardware platform.
• Supporting incompatible software: some older software will not run on newer systems. A VM can emulate an older system, on which the user can run the older software.
• Creating a test system: VMs are closed and controlled environments. The "hardware" of a VM exists only as a self-contained software process that is isolated from the real host system. This makes it possible to run software that could be damaging, such as malware, or early versions of software that need to be analysed.
• Running multiple servers: servers on a network have to fill several roles, such as giving access to file stores or storing email accounts for users. Several servers can run as VMs on one physical machine, which keeps the services separate without needing several pieces of hardware.

Note When a question asks for the benefits of a virtual machine, use these uses as your benefits.

Instead of compiling program code into machine code that can only run on similar platforms, some languages use a virtual machine as a go-between for the system and the source code. Before it runs, the original program is translated into intermediate code, which is then passed to a virtual machine. The VM runs this code and works out how to control the host computer so that it carries out the right instructions.

Using a VM as a go-between for the system and the source code means the same code can be used on any platform that can run the VM. Java works in this way: the high-level code is compiled to Java bytecode, and then the Java virtual machine executes the code on whatever hardware platform it is running on.